搜索资源列表
minimigJ_source_04_08_2008
- Verilog, c and asm source codes of the Minimig system, a fpga implementation of the Amiga computer. Version minimig-j used on the Minimig fpga board.
Source_minimig_DE1_DE2_12e_new
- Verilog, VHDL, c and asm source codes of the Minimig system, a fpga implementation of the Amiga computer. Version minimig-de1/de2 used on the de1 and de2 fpga boards.
snapshot_ver1.26
- Verilog, VHDL, c and asm source codes of the Minimig system, a fpga implementation of the Amiga computer. Version c-one used on the c-one fpga board.
veri_adder
- verilog VHDL codes for adders
NewFolder
- these are the codes written in verilog which are for a dual elevator design
SwitchCheck
- 一个通用的SPI程序,由VERILOG语言编写。时钟由控制机提供，可以修改SPI的发送数据位数。-a SPI codes
ass1_2_hamming
- Hamming codes are a class of binary linear codes. They can detect up to two simultaneous bit errors, and correct single-bit errors. In particular, a single-error-correcting and double error detecting variant commonly referred to SECDED.-a) Develop a
finial_test
- 卷积码和Viterbi译码的源程序，在Xilinx ISE环境下使用Verilog编写，有助于卷积码和Viterbi译码的学习-Convolutional codes and Viterbi decoding of the source, in the Xilinx ISE environment, use of Verilog prepared to help convolutional codes and Viterbi decoding of the study
LED_Verilog
- This contain the Verilog code for LED in FPGA Spartan 3E kit. All codes are tested and bit file are ready to use.
decode
- codes for different modules in verilog
decode12
- codes for different modules in verilog
decoder-and-encoder
- codes for different modules in verilog
ml605_PCIe_Gen1_x8_rdf0008_13.1_c
- ML605_Reference_Designs:ml605_PCIe_Gen2_x4_rdf0009,xilinx开发板的PCIe设计例程，包括源码和下载文件.verilog-ML605_Reference_Designs：PCIe codes and download files include ace and bit file
calculator
- 这是一个设计16位计算器，运用Verilog HDL语言编写，可以实现简单的加减法计算。并且可以在Xilinx91i上仿真。其中 top.v文件为目录，calculator.v为计算器设计，display.v为显示设计，divclk.v为分频设计，keypad.v为键盘设计，并且testkeypad.v为检测程序。-design a 16-bit calculator using the Spartan 3 FPGA on the Digilent circuit board, with an
ldpc-encode
- 深空通信中AR4JA码编码的研究与实现，ＡＲ４ＪＡ码是ＬＤＰＣ码的一种，文件中是Ｖｅｒｉｌｏｇ语言的硬件实现。-Research and Implementation of the Deep Space Communications AR4JA coding, AR4JA code LDPC codes a hardware implementation of the Verilog language file.
RS232C_Verilog.rar
- rs232c 的verilog hdl 源码，验证可用，利于大的系统集成。,The codes of verilog hdl for RS232C, its useful characteristic can be integrated in a big system.
CooperativeCommunication
- 1. 研究空时分组码的编译码原理及算法； 2. 研究了几种不同的协作分集系统模型和协作分集协议； 3. 将空时分组码编译码器与协同通信用硬件描述语言Verilog实现，并在ISE集成环境中综合仿真，结果正确后下载到FPGA电路板上； 4. 用示波器观察输出数据是否正确，验证空时分组码协同通信的性能。 -1. Decoding Principles of space-time block codes and algorithms 2. Study several differen
src
- AXI Slave codes in verilog. Downloded from www.opencores.org free download
UltraSensor-Vram-V8
- Verilog语言编写的FPGA程序，有串口收发引擎代码，AD初始化采集代码,键盘扫描代码-FPGA Verilog language program, a serial port transceiver engine code, AD initialization acquisition code, the keyboard scan codes
CycloneII-VerilogV
- Altra CyloneII Verilog文件，共有18个工程，包括标准键盘、串口、VGA、EEPROM、LCD1602等操作源码-Altra CyloneII Verilog files,include keyboar.com.VGA、EEPROM、LCD1602 operation surce codes